Embedded Multiprocessors: Scheduling and Synchronization by Sathya Sriram, Shuvra S. Bhattacharyya

By Sathya Sriram, Shuvra S. Bhattacharyya

Embedded MultiprocessorsScheduling and SynchronizationSeries quantity: three This merchandise is a part of the sign Processing and Communications sequence. Application-specific, embedded multiprocessors are more and more stumbled on this present day in excessive- functionality communications and multimedia platforms resembling mobile telephones and base stations, high-speed modems, set-top bins, and switches in high-speed networks. Systematic layout and research of such embedded multiprocessors is changing into a vital study region in and academia.This ebook makes a speciality of the incorporation of interprocessor verbal exchange charges into multiprocessor scheduling judgements, modeling and research of multiprocessor approach functionality, and the appliance of the synchronization graph version to the advance of and software program that could considerably lessen interprocessor communique overhead.Embedded Multiprocessors is a exceptional single-source reference essential for electric and electronics, desktop, communications, sign processing, and microprocessing engineers, and upper-level undergraduate and graduate scholars in those disciplines.

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Extra resources for Embedded Multiprocessors: Scheduling and Synchronization (Signal Processing and Communications)

Example text

The main steps involved in scheduling tasks on multiple processors are discussed fully in Chapter 4. Each of these machines employs elaborate hardware to implement dynamic scheduling within processors, and employs expensive communication networks to route tokens generated by actors assigned to one processor to tasks on other processors that require these tokens. In most DSP applications, however, such dynamic scheduling is u n n e c e s s ~since compile time predictability makes static scheduling techniques viable.

Field programmable gate array or FPGA), or higher'levelbuilding blocks that can be easily configured and reconfigured to provide range of different functions, Building dedicated circuit for given function can result in large speedups; examples of such functions are bit manipulation in applications such cryptography and compression; bit-field extraction; highly regular computations such Fourier and Discrete Cosine Transforms; pseudo random number generation; compact lookup tables, etc. One strategy that has been employed for building configurable computers to build the machine entirely out of reconfigurable logic; examples of such machines, used for applications such DNA sequence matching, finite field arithmetic, and encryption, are discussed in [G+91][~~95][GMN96~[~+96].

Scheduling is fundamental operation that must be performed in order to implement SDF graphs on both uniprocessor well multiprocessors. Uniprocessor scheduling simply refers to determining sequence of execution ofactors such that all precedence constraints are met and all the buffers between actors correspondi in^ to arcs) return to their initial states. Multiprocessor scheduling involves determining the mapping of actors to available processors, in addition to determining of the sequence in which actors execute.

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